Welcome to CS3350, 2018!
	  
	  
		
		- Jan. 5: First lecture (4:30-5:30pm, Tuesday, Jan. 8).
 
                - Jan. 19: Assignment 1 has been posted.
 
                - Jan. 22: Assignment 1: corrections have been made (marked in red).
 
                - Jan. 24: Assignment 1: aditional corrections have been made (marked in red).
 
                - Jan. 25: Quiz 1 will take place in class.
 
                - Feb. 6: Assignment 2 has been posted.
 
                - March. 9: Assignment 3 has been posted.
 
                 - March. 25: Assignment 4 has been posted.
 
                 
		
	  
      
     
	
	
      Lecture slides, recommended readings and supplementary materials
	  
	  
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			  - Lectures:
				
				  - Lecture 1: [pdf] Introduction, motivation and work plan
				  
 
				  - Lecture 2: [pdf] CPU Performance and Profiling				
				  
 
				
			   
			  
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			  - Lectures:
				
				  - Lecture 3.1: [pdf] Memory hierarchy: what and why? 
				  
 
				  - Lecture 3.2: [pdf] Memory hierarchy: how? 				
				  
 
				
			   
			  
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			  - Lectures:
				
				  - Lecture 4.1: [pdf] MIPS Introduction	  
 
				  - Assignment 1 has been posted and Quiz 1 is held on Thursday.				
				  
 
				
			   
			  
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			  - Lectures:
				
				  - Lecture 4.2: [pdf] MIPS Instruction Representation 
 
				  - Lecture 4.3: [pdf] MIPS Procedures and Compilation	  
 
				
			   
			  
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			  - Lectures:
				
				  - Lecture 5.1:  [pdf] Synchronous Digital Systems.  
 
				  - Lecture 5.2:  [pdf]  State Circuits:
Circuits that Remember.	  
 
				
			   
			  
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			  - Lectures:
				
				  - Lecture 5.3:  [pdf] Representations of Combinational Logic Circuits.  
 
				  - Lecture 5.4:  [pdf]  Combinational Logic Blocks.  
 
				  - Lecture 5.5:  [pdf]  Single-Cycle CPU Datapath Design	  
 
				
			   
			  
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			  - Lectures:
				
				  - Lecture 5.6:  [pdf]  Single-Cycle CPU:
Datapath Control (Part 1).   
 
				  - Lecture 5.7:  [pdf]  Single-Cycle CPU:
Datapath Control (Part 2).  
 
				
			   
			  
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			  - Lectures:
				
				  - Lecture 6.1:  [pdf]  Fundamentals of
Instructional Level Parallelism.   
 
				  - Lecture 6.2:  [pdf]  Instructional Level Parallelism:
Hazards and Resolutions.  
 
				  - Lecture 6.3:  [pdf]  Instructional Level Parallelism:
Advanced Techniques.  
 
				
			   
			  
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			  - Lectures:
				
				  - Lecture 7.1:  [pdf]  Multicore: Basics and Key Issues.   
 
				  - Lecture 7.2:  [pdf]  Multicore TLP (1).  
 
- Multicore programming in CilkPlus:  [pdf]  
 
				
			   
			  
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			  - Lectures:
				
				  - Lecture 8.1:  [pdf]  An Overview of General Purpose Graphics Processing Units.   
 
				  - Lecture 8.2:  [pdf]  Efficient Usage of GPUs Memory Hierrachy:
Lesson Learning through Matrix Transposition.  
 
				
			   
			  
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      Homework and Schedule
      Note: Exercises and assignments will be posted via OWL.
	   Tentative Assignment, Quiz and Test Schedule
	  
	 
	
    
      Teaching Crew and Hours
      
		- Instructor 
		  Prof. Marc  Moreno-Maza
		  email: moreno@csd.uwo.ca 
		  
		  Lecture hours: 4:30-5:30pm on Tuesdays, 3:30-5:30pm on Thursdays 
		  Lecture room: MC 105B 
		  
		  Office: Middlesex College, Room 327
		  Office hours: 13:30-15:20pm on Tuesdays 
		 
		
		- Teaching Assistants
		  
		  
			| Name | Office/Tutorial Hours | Room | 
			
			| Alexader Brandt | Thursdays,13:30 to 14:30  | MC4A | 
			
			| Davood Mohajerani | Tuesdays, 17:30 to 18:30 | MC4A | 
			
                         | Mingda Sun | Wednesdays, 13:30 to 14:30 | MC4A | 
			
			
		  
		 
	  
     
	
      Feedback
      A course forum and feedback polls will be available at OWL.